An example of a conventional charge pump DC/DC converter circuit is shown in FIG. 34. This circuit is a double step-up charge pump circuit that outputs a voltage twice as much as a power source voltage Vin. As shown in the figure, the DC/DC converter includes a charge pump SW circuit 55, drive circuits 51–54, step-up capacitor C51, and an output capacitor C52. The charge pump SW circuit 55 is made of semiconductor switches Q51–Q54 each being a MOS transistor. The transistors Q51–Q54 are turned on and off by the respective drive circuits 51–54. The drive circuits 51–54 are controlled by externally-supplied signals 51a–54a, respectively. It is noted that “SW” indicates a switch, unless otherwise stated.
When the charge pump performs the step-up, the following two operations (i) and (ii) are repeated: (i) the semiconductor switches Q52 and Q54 are turned on while the switches Q51 and Q53 are turned off, so that the capacitor C51 is charged up to the power source voltage Vin, and (ii) the switches Q51 and Q53 are turned on while the switches Q52 and Q54 are turned off, so that the capacitor C52 is charged up to a voltage which is the sum of the voltage of the capacitor C51 and the power source voltage Vin, and as a result an output voltage is obtained.
The above-described conventional DC/DC converter circuit is disadvantageous in that a rush current or a peak current flows when the step-up operation is carried out while the capacitors C51 or C52 is not sufficiently charged, thereby exerting an adverse effect on other devices.
The details of the above will be given. A charge pump circuit 5 includes a charge pump SW circuit 55 and drive circuits 51–54. In accordance with signals supplied to the drive circuits, the drive circuits drive the charge pump SW circuit 55.
FIG. 34 shows a circuit which is generally termed “doubler”. This doubler includes two capacitors (C51 and C52) and fours switches (Q51, Q52, Q53, and Q54). The doubler is switched between two states.
In one state, the output voltages of the drive circuits 51, 53, and 54 are at H (high) level, while the output voltage of the drive circuit 52 is at L (Low) level. Also, the switches Q51 and Q53 are turned off while the switches Q52 and Q54 are turned on, so that the capacitor C51 is charged. In this state, the capacitor C51 is charged up to the power source voltage Vin.
In the other state, the levels of the output voltages of the respective drive circuits are inverted. That is, the output voltages of the drive circuits 51, 53, and 54 are at L (Low) level, while the output voltage of the drive circuit 52 is at H (High) level. Also, the switches Q51 and Q53 are turned on while the switches Q52 and Q54 are turned off. As a result, the capacitor C52 is charged up to the sum of the voltage of the C51 and the power source voltage Vin.
The aforesaid two states are repeatedly alternated so that the resultant output voltage is twice as high as the power source voltage Vin.
In FIG. 34, in a case where (i) the capacitor C51 in the early stage of operation has not have sufficient electric charges, (ii) the switches Q51 and Q53 are turned off and (iii) the switches Q52 and Q4 are turned on, the power source voltage Vin is connected with the capacitor C51. As a result, an extremely large charging current flows. Such an extremely large current that flows in the early stage of operation is termed rush current.
Meanwhile, assume that the switches Q51 and Q53 are turned on and the switches Q52 and Q54 are turned off, while either the capacitor C52 in the early stage of operation has not had sufficient electric charges or the accumulated electric charges in the capacitor C52 are discharged on account of the load fluctuation and hence the output voltage decreases. In such a case, the capacitors C51 and C52 are connected to each other. As a result, an extremely high peak current flows.
Since the charge pump circuit is a power source circuit, the output terminal thereof is connected to another circuit. Also, the primary source side (Vin) of the charge pump circuit is connected to another circuit.
In a case where the aforesaid circuits commonly use the same power source Vin, the voltage Vin may decrease on account of wire resistance influenced by the rush current and peak current, thereby causing malfunction of the circuit. Furthermore, if a current larger than a permissible amount of the wire flows, the wire for the power source may break down.
As means for resolving the adverse effects on connected devices on account of the rush current, a circuit shown in FIG. 35 has been proposed (Japanese Laid-Open Patent Application No. 10-014218 (published on Jan. 16, 1998)).
The circuit shown in FIG. 35 is provided with a circuit 64 that detects a voltage of the step-up capacitor C61 and a gate drive voltage varying circuit (made up of members 62, 64, and 65) controlling the gate voltage of the capacitor C61, which connects/disconnects the power supply side to/from the step-up capacitor C61. When the voltage of the capacitor C61 is high, the gate voltage is increased so that the on-resistance of the capacitor C61 is decreased. Meanwhile, when the voltage of the capacitor C61 is low, the on-resistance of the capacitor C61 is increased so that a charging current flowing into the capacitor C61 is restrained. In this manner, the aforesaid problem is resolved.
However, assume that (i) the capacitors C61 and C63 are turned off while the switches 67 and 68 are turned on so that the capacitors C61 and C62 are connected to each other, and (ii) the capacitor C62 is not sufficiently charged. In this case, a peak current flowing from the capacitor C61 to the capacitor C62 may be generated. Moreover, it is necessary to incorporate, into the SW circuit of the charge pump, the gate drive voltage varying circuit (made up of members 62, 64, and 65), which controls the gate voltage of a transistor 61 which connects/disconnects the power supply side to/from the step-up capacitor C61. Furthermore, since the gate drive voltage is controlled by a control signal OSC of the charge pump, it is necessary to pay close attention to the arrangement of the gate drive voltage varying circuit (made up of members 62, 64, and 65) and the cycle of the control signal OSC.